Migration to copper-lowk interconnect is primarily driven by improved RC delay, power dissipation and electromigration performance. New materials create a serious challenge for the chip makers, due to integration, manufacturing and reliability concerns. Some of the integration challenges are created by deviation from traditional subtractive etch scheme for Al interconnect to Damascene schemes for Cu interconnect. In the subtractive etch, Al metal lines are etched. Whereas in Cu-Damascene interconnect, dielectric trenches are patterned, which are than filled with Cu metal and polished.

In this presentation pros and cons of various approaches to create damascene structures are discussed. Successful integration requires optimization of low-K dielectric stack with etch, lithography, metal barrier, electroplated Cu and CMP polish of the Cu. Also some of the electrical results are presented for integration of two level Cu metal with Black-Diamond as a lowK dielectric.